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| MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER DESCRIPTION The M65530FP is a CMOS 10-bit digital-to-analog converter for video signal processing. The IC features an adjustment function of analog output amplitude, thereby controlling the amplitude by simply changing an adjustment resistor. FEATURE * * * * * * Triple 10-bit video speed D-A converters Maximum conversion rate of 50 MSPS Adjustable analog output amplitude...............................2.0V(Typ) Digital input....................................................................TTL level Power down function for analog blocks Surface mounting package (68-pin quad flat package, 0.65mm line and space, 14 x 10 mm body) APPLICATIONS TV, VCR, etc. RECOMMENDED OPERATING CONDITION Supply voltage range.................................................4.75 to 5.25 V Rated supply voltage...............................................................5.0 V PIN CONFIGURATION (TOP VIEW) VZ IOUTR 55 56 34 33 32 31 30 29 N.C CEB BLK B9 B8 B7 B6 B5 B4 B3 B2 B1 B0(LSB) G9 IOUTRB 57 AVDD AVDD IOUTG 58 59 60 IOUTGB 61 AVDD AVDD IOUTB 62 63 64 M65530FP 28 27 26 25 24 23 22 21 IOUTBB 65 AVDD AVDD DVDD 66 67 68 Outline 68P6S-A NC:NO CONNECTION 1 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER BLOCK DIAGRAM 68 R0(LSB) R1 R2 R3 R4 R5 R6 R7 R8 R9 G0(LSB) G1 G2 G3 G4 G5 G6 G7 G8 G9 B0(LSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 BLK CEB DVSS N.C N.C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 LATCH & DECODER LATCH & DECODER LATCH & DECODER 67 66 DVDD AVDD AVDD IOUTR IOUTRB VG1'R CLKR VG1R VGR IrefR AVDD AVDD IOUTG IOUTGB VG1'G CLKG VG1G VGG IrefG AVDD AVDD IOUTB IOUTBB VG1'B CLKB VG1B VGB IrefB VG2 AVSS AVSS VZ N.C CURRENT CELL MATRIX 56 57 49 CLOCK DRIVER REFERENCE CURRENT SOURCE + 36 48 45 42 63 62 CURRENT CELL MATRIX 60 61 51 CLOCK DRIVER REFERENCE CURRENT SOURCE + 37 50 46 43 59 58 CURRENT CELL MATRIX 64 65 53 CLOCK DRIVER REFERENCE CURRENT SOURCE REFERENCE VOLTAGE SOURCE + 38 52 47 44 40 54 41 33 39 20 34 VOLTAGE REGULATOR 55 35 ABSOLUTE MAXIMUM RATINGS Symbol DVDD AVDD VID IOUT Pd Topr Tstg Parameter Digital supply voltage Analog supply voltage Digital input voltage Analog output current Power dissipation Operating temperature Storage temperature (Ta = 25C, unless otherwise noted.) Conditions Pin 68 Pin 58, 59, 62, 63, 66, 67 Pin 1 to 19, 21 to 33, 36 to 38 Pin 56, 57, 60, 61, 64, 65 Ratings 0 to 7.0 0 to 7.0 0 to 7.0 -30 to 0 900 0 to +70 -20 to +125 Unit V V V mA mW C C In current measurement, (+) and (-) is corresponding to an inflow and an outflow current, respectively. 2 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER ELECTRICAL CHARACTERISTICS (Ta = 25C, AVDD Symbol Res VDD DIDD AIDD NL DNL VIH VIL tsu th ts VFS VZ Parameter Resolution Supply voltage Digital supply current Analog supply current Integral nonlinearity Differential nonlinearity Digital input voltage "H" Digital input voltage "L" Data set-up time Data hold time Settling time Full-scale amplitude Regulated voltage source = DVDD = 5.00V, unless otherwise noted.) Test conditions Limits Typ. 10 5.00 8 100 Unit Bits V mA mA LSB LSB V V ns ns ns VP-P V Min. 4.75 Max. 5.25 RL=75, Rref=750 RL=75, Rref=750 2.15 0 5 5 RL=75, Rref=750, 1%FS RL=75, Rref=750 1.28 2.0 0.5 VCC 0.85 25 2.0 In current measurement, (+) and (-) is corresponding to an inflow and an outflow current, respectively. RECOMMENDED OPERATING CONDITIONS Symbol VDD VIH VIL tWH tWL tsu th Parameter Supply voltage Digital input voltage (High) Digital input voltage (Low) Clock pulse width (High) Clock pulse width (Low) Set-up time Hold time Min. 4.75 2.15 0 10 10 5 5 (Ta = 25C, unless otherwise noted.) Limits Typ. 5.00 Unit V V V ns ns ns ns Max. 5.25 VCC 0.85 3 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER DESCRIPTION OF PIN Pin No. 1 to 10 11 to 19, 21 20, 34, 35 22 to 31 32 33 36 to 38 39 40 41 42 to 44 Name R0 to R9 G0 to G9 N.C. B0 to B9 BLK CEB CLKR,G,B DVSS VG2 AVSS IrefR,G,B I/O I I I I I I O O Function Digital input pin for a DAC (Red channel). Digital input pin for a DAC (Green channel). No connection. It is grounded during actual use. Digital input pin for a DAC (Blue channel). Analog output setting during a blanking interval. Power-down control during unused conditions. Clock input. Digital ground. Reference voltage for a current switch. Analog ground. The resistor for a conversion between voltage and current is connected to this pin. A voltage input for an analog output current control. It is connected to the VZ(pin 55) during an actual use. Phase compensation for a reference current source. A reference voltage input for a current matrix. It is connected to VG1 according to the application. Analog ground. Reference voltage output. Analog output. Inverse analog output. Analog supply voltage of 5.0V. Digital supply voltage of 5.0V. It connects to --DSP LSI DSP LSI GND DSP LSI Control LSI Control LSI DSP LSI GND Bypass capacitor GND Current setting resistor Variable resistor Phase compen. capacitor Phase compen. capacitor GND Bypass capacitor Output terminal (filter) GND Power supply Power supply 45 to 47 VGR,G,B I 48, 50, 52 VG1R,G,B O 49, 51, 53 54 55 56, 60, 64 57, 61, 65 58, 59, 62 63, 66, 67 68 VG1'R,G,B AVSS VZ I OUT R,G,B I OUT RB,GB,BB AVDD DVDD I O O O - 4 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER Table of an analog power-down function (pin 33) Analog power-down signal "H" "L" Power-down function Power-down Normal operation Table of a blanking function (pin 32) Blanking signal "H" "L" Blanking function Blanking Normal operation * A blanking operation sets an analog output to 0V on the first rising edge of the clock after a blanking signal has become "H" regardless of a digital input code. Table of an analog output function (iout) Digital input code 9 MSB 1 1 8 1 1 7 1 1 6 1 1 5 1 1 4 1 1 3 1 1 2 1 1 1 1 1 0 LSB 1 0 Analog output voltage 2.0000V 1.9980V 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1.0000V 0.9980V 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0.0020V 0.0000V Note : The analog output voltage is a theoretical value in the condition of VDD = 5.0V, VZ = 1.28V, Rref = 768 and RL = 75. INPUT / OUTPUT TIMING DIAGRAM tsu th DATA INPUT CLOCK INPUT tWL tWH ts +1%FS -1%FS ANALOG OUTPUT tds 10% tpd Where both BLK and CEB are low. 50% tds tpd 7nS 10nS 5 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER CURRENT SETTING RESISTOR (Rref) AND OUTPUT LOAD RESISTOR (RL) (external components) Full-scale output amplitude (VFS) of each D/A converter is ; VFS = (VG / Rref) x 16 x RL (VP-P). where VG = 1.28 V, Rref = 768 , RL = 75 and VDD = 5.0V. The full-scale output of about 2.0 VP-P is available by setting RL and Rref to 75 and 768 , respectively. An output impedance of the analog output terminal is almost the same as the load resistor (RL). NOTES TO THE OPERATION 1. Both a ground and a supply planes in a PCB should be as wide as possible for reducing a parasitic inductance and resistance. Especially, for the better performance, the analog plane needs to be much wider. 2. A tantalum or electrolytic capacitor of 10F or more and a ceramic capacitor of 0.01F are tied together, which are connected between a digital supply and ground, also between a analog supply and ground. These capacitors should be placed as close as possible to the IC. They work as bypass capacitors for preventing a degradation in the performance by a supply voltage fluctuation caused by digital signals including a clock and digital inputs and so on. 3. The analog output should be isolated as much as possible from a clock and digital inputs, thus minimizing decoupling and interactive noise. 6 MITSUBISHI ICs (AV COMMON) M65530FP TRIPLE 10-BIT VIDEO D-A CONVERTER APPLICATION EXAMPLE 68 67 66 65 64 63 62 61 60 59 58 57 56 55 R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 G0 G1 G2 G3 G4 G5 G6 G7 G8 1 R0(LSB) 2 R1 3 R2 4 R3 5 R4 6 R5 7 R6 8 R7 9 R8 10 R9 11 G0(LSB) 12 G1 13 G2 14 G3 15 G4 16 G5 17 G6 18 G7 19 G8 20 N.C M65530FP AVSS 54 VG1'B 53 VG1B 52 VG1'G 51 VG1G 50 VG1'R 49 VG1R 48 VGB 47 VGG 46 VGR 45 lrefB 44 lrefG 43 lrefR 42 AVSS 41 VG2 40 DVSS 39 CLKB 38 CLKG 37 CLKR 36 N.C 35 CLKB CLKG CLKR 0.01 750 750 750 0.01 0.01 0.01 0.01 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Units Resistance : Capacitance : F Digital power supply Digital GND Analog power supply Analog GND 7 |
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